1. Technical Field
The present invention relates to an incremental time delay generator. Such a generator can be used in a time domain reflectometer. In particular, the present invention relates to an incremental time delay generator which can be disposed on a small substrate and which utilizes superconductor technology.
2. Description of the Related Art
The use of superconductor technology in the form of superconducting devices, and in particular Josephson tunneling devices, in sampling or analog to digital (A/D) circuits is already known in the art. Use of a Josephson device provides a very sensitive detector offering the possibility of very fast sampling speeds because such a device is capable of extremely fast switching speed between two stable states and because the device responds to extremely small magnetic fields. U.S. Pat. No. 4,401,900 "Ultra High Reduction Josephson Sampling Technique" by Faris, shows a Josephson sampling technique with a time resolution of 5 picoseconds and a sensitivity of 10 microvolts. The time resolution of the described sampling system is extendable to the subpicosecond domain, limited ultimately by the intrinsic switching speed of the Josephson device used as the sampling gate. In principle, the switching speed can be as little as 0.09 picoseconds.
Related U.S. application Ser. No. 912,785, "Time Domain Reflectometer" discloses the use of Josephson junction technology to accurately measure discontinuities of network connections and to determine parameters of certain networks and devices. Time domain reflectometers comprise sampling circuitry including a step or pulse source. The related application discloses a time domain reflectometer which increases the switching speed of the reflectometer system and integrates on a single integrated circuit chip, a step generator, sampling circuitry, filter elements and ultra high performance transmission lines. This integrated chip achieves minimum jitter during the operation of the TDR system since all of the circuitry, which has reduced jitter already due to Josephson junction technology, is subject to the same random disturbances which may occur.
A problem still arises in that a time delay generator is needed for the reflectometer. A timing delay must be generated between producing a step signal and introducing a sampling pulse in the time domain reflectometer of the related application. One solution is to provide an external source of delay. An internal source of delay may be utilized where the internal source of delay may include a capacitor bank. Neither of these two solutions to the problem of providing a time delay generator provide a variable incremental time delay generator which is easily variable and integrated with the chip that constitutes the time domain reflectometer. The delay range available is limited and the generation of the time delay is subject to jitter.